Computer Architecture
Teaching Staff: Stefanidakis Michael
Code: HY140
Course Type: Core Course
Course Level: Undergraduate
Course Language: Greek
Semester: 3rd
ECTS: 5
Teaching Units: 4
Lecture Hours: 2
Lab/Tutorial Hours: 2L
Total Hours: 4
E Class Page: https://opencourses.ionio.gr/courses/DDI110/
Curricula: Revamped Curriculum in Informatics from 2025
The Course
A core course for the 2nd year of the Department of Informatics. During the course, the foundations for understanding Computer Architecture are laid, and a wide range of topics in digital technology, design, performance measurement, and advanced computing architectures are covered.
Laboratory
The Architecture course is accompanied by a corresponding laboratory, which aims at the design and simulation of a basic Central Processing Unit (CPU).
Upon successful completion of the "Computer Architecture" course, undergraduate students will be able to:
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Understand the organization of a typical computer and the relationship between architecture and technology.
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Autonomously follow further developments in the field of computer architecture.
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Connect the needs of an application with the required hardware architecture.
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Select and recommend appropriate hardware and software components for building efficient computing systems.
1st week:
Introduction to Computer Architecture - Fundamental operating principles of computers.
2nd week:
Instruction Set Architectures (ISA)
3rd week:
Instruction Set Architectures (II) - Data origin and memory access.
4th week:
Instruction Set Architectures (III) - RISC-V Architecture
5th week:
Central Processing Unit - Design and operation of a simple CPU.
6th week:
CPU Performance - Measurement and performance improvement techniques.
7th week:
Instruction-Level Parallelism - Pipelining and other performance enhancement techniques.
8th week:
Instruction-Level Parallelism - Superscalar processors.
9th week:
Main Memory Technologies.
10th week:
Cache Memories - Organization, operation, and performance.
11th week:
Virtual Memory - Its role in the memory hierarchy.
12th week:
Input-Output Interconnection - I/O devices and buses.
13th week:
Input-Output Interconnection - Interrupts and data transfer via DMA.
Back
Studies
e-mail: cs@ionio.gr
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